SUNNYVALE, Calif. – December 6, 2012 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for home entertainment, networking, mobile and embedded applications, today publicly announced a major release of the MIPS® architecture, encompassing the MIPS32®, MIPS64® and microMIPS™ instruction set architectures. Based on work done over more than two years, Release 5 (“R5”) of the MIPS base architecture incorporates important functionality including virtualization and SIMD (Single Instruction Multiple Data) modules.
MIPS SIMD Architecture (MSA) Module
- Major release of the MIPS architecture—based on years of development—includes significant functionality for next-generation MIPS-Based™ products
- MIPS SIMD architecture (MSA) module provides more computational capability for a wide range of applications
- Scalable Virtualization (VZ) module provides secure hardware virtualization across a range of applications from tiny microcontrollers to high-end enterprise
- Enhanced Virtual Addressing (EVA) technology extends available memory space for large modern workloads
- Popular multi-threading and DSP extensions are now integrated as modules within the base MIPS architecture
The MIPS SIMD architecture (MSA) module allows efficient parallel processing of vector operations. This functionality is of growing importance across a range of applications. For consumer electronics such as mobile and home entertainment devices, SIMD provides support for media-rich applications including communications, audio, video, image and graphics processing. For enterprise applications, SIMD provides higher throughput data movement, especially important for scientific/high-performance computing and data mining. The MSA module provides a future-proof and extensible option for these applications.
The MSA module will add a number of new instructions to the MIPS architecture, implemented with strict adherence to RISC (Reduced Instruction Set Computer) design principles. From the beginning, MIPS architects designed the MSA with simple instructions that lead to less complex implementations. These simple instructions are also easy to support within high-level languages such as C or OpenCL. This enables fast and simple development of new code, as well as leverage of existing code.
MIPS Virtualization (VZ) Module
The MIPS Virtualization (VZ) module is a highly-scalable option that provides a number of capabilities, including enhanced security features and support for multiple operating systems. Across the home entertainment and mobile markets, hardware virtualization enables security and content protection—especially important as consumers increasingly use these devices for HD media streaming, cloud storage, secure ID protection, mobile payments and other highly secure applications. As 32-bit microcontrollers become more capable, security needs are also increasing in embedded applications such as smart grids and smart meters. Virtualization is also important in the enterprise, where it allows multiple operating systems and applications to run in parallel, and enables workload consolidation. The MIPS VZ module is a simple and flexible hardware-based solution that satisfies these varied requirements with limited or no performance impact.
Continued Innovation in the MIPS Architecture
This latest release of the MIPS architecture builds on a rich RISC heritage, created over nearly three decades. The MIPS architecture has powered numerous generations of products, with more than three billion MIPS-Based devices shipped to-date.
In addition to the MSA and VZ modules, Enhanced Virtual Addressing (EVA) was recently added to the MIPS architecture. EVA allows for more flexible definition of virtual address space, extending available memory for large modern workloads. This feature is already supported in MIPS’ new proAptiv™ and interAptiv™ core families.
R5 of the MIPS architecture also incorporates select functions—such as multi-threading and DSP—that were previously Application Specific Extensions (ASEs). This development aims to ease the process for licensees to integrate these popular technologies into their products, and continue to grow the already broad ecosystem around the MIPS architecture.
The ecosystem around the MIPS architecture includes a wide range of development tools, operating systems, applications, middleware, device drivers and more. MIPS and its licensees are working with ecosystem providers to support the capabilities in R5.
Key features of the MIPS architecture R5 specification are available for licensing now. Leveraging the enhanced functionality, several MIPS licensees already have products in development. These features are expected to be added to MIPS processors in the coming year. For more information, contact email@example.com
, or visit www.mips.com
“MIPS R5 is a major release of the MIPS architecture. We’re incorporating important capabilities that will be key to many of our customers’ future generations of home entertainment, mobile, networking and embedded products. With this enhanced functionality, our licensees can also take advantage of the performance and efficiency benefits of MIPS in new applications and markets.”
— Gideon Intrater, Vice President of Marketing, MIPS Technologies, Inc.
“It’s great to see MIPS continuing to invest in advancing its architecture by adding new instructions for features such as virtualization and SIMD processing. With Release 5, the MIPS instruction set will be more efficient for secure computing, addressing markets that range from microcontrollers to handsets and networking equipment. Moreover, the new SIMD instructions will improve DSP performance, which should allow the MIPS CPUs to save power on applications such as audio processing. We believe that MIPS licensees will welcome the improvements provided in the Release 5 architecture, since customers should be able to quickly take advantage of the new instructions through minor changes to system-level software.”
—J. Scott Gardner, Senior Analyst, The Linley Group / Microprocessor Report
MIPS Architecture Founders and Early Contributors
“Thirty years ago when we created the MIPS architecture, we embraced a new philosophy of computer design, with a focus on efficiency and simple extensible design principles. RISC was an important innovation in computer architecture, and I am pleased to see the continued innovation and development of the MIPS RISC architecture over the years. The initial simplicity and flexibility has enabled the architecture to grow and incorporate new architectural concepts, enabling MIPS to become one of the leading embedded architectures today.”
—John L. Hennessy, Office of the President, Stanford University
(Co-Founder, MIPS Computer Systems, 1984)
“In the 1980s, RISC represented an entirely new computing paradigm that made extremely high-performance computing efficient and affordable. MIPS was the first commercially available RISC chip. The MIPS RISC architecture played a key role in making computing ubiquitous, and in development of the fabless semiconductor model. It was exciting to be a part of MIPS at that time, and through the years that followed. Today, it is gratifying to see continued innovation in the MIPS architecture, as it continues to develop and grow.”
—Skip Stritter, Co-Founder, MIPS Computer Systems, 1984
“As the first employee of MIPS Computer Systems in the 1980s, it was exciting to be a part of the development of MIPS, including the introduction of the first 64-bit microprocessor. Over more than 25 years, the MIPS architecture has been used in a wide range of products including workstations, networking equipment, game players, televisions and countless other products. To support creation of these products, MIPS and a large number of third parties have developed an incredible amount of compatible software. This critical software base, together with continued innovation by MIPS and its licensees, has driven the MIPS architecture to become one of the leading architectures in the industry.”
—Larry Weber, Independent Computer and Software Professional
(VP of Software Development, MIPS Computer Systems, 1984 – 1992)
“The simplicity of RISC designs can lead to substantial performance benefits. Delivering on this concept through the creation of the MIPS architecture—one of the early RISC architectures—was a huge paradigm shift in the 1980s. Having worked on the original design and ushering it through its days at MIPS Computer Systems and SGI, I am proud to see that the architecture remains as relevant today as it was then, and that it has been used in so many different kinds of applications. The architecture’s simplicity, efficiency and extensibility continue to make it stand apart in today’s design landscape.”
—John Mashey, Consultant, Techviser
(Manager/Director/Vice President, MIPS Computer Systems 1985 – 1992; Director,
Vice President and Chief Scientist, Silicon Graphics, 1992 – 2000)
“In the early days at MIPS Computer Systems, we developed the world’s first 64-bit microprocessor and numerous other groundbreaking technologies. It’s great to see the continued innovation of the MIPS architecture. From a technical perspective, I believe that the MIPS architecture is still the best commercial processor architecture available, and it is not likely to be surpassed in that respect. In the future there is a tremendous opportunity to unleash the inherent power and efficiency of the architecture into the mobile computer space. I look forward to the day I can have a MIPS processor embedded somewhere inside me to augment my other fast-failing systems!”
—Thomas J. Riordan, EVP and COO, MoSys
(Director of CMOS VLSI, MIPS Computer Systems 1985 – 1992)
“In my long career as a microprocessor architect, I have had the opportunity to work in some aspect with all of the major processor architectures, including MIPS. The high performance, flexibility and scalability of the MIPS architecture have given it longevity in the industry. I am pleased to see continued innovation in the MIPS architecture, especially the addition of SIMD, which is increasingly important for today's multimedia workloads.”
—Keith Diefendorff, Independent Consumer Electronics Professional
“The story of the MIPS architecture is a story of innovation in both microprocessors, and the applications they enable. As an original MIPS licensee, we were proud to work with innovative companies that leveraged the unique capabilities of the architecture to develop groundbreaking products across the communications, computing and consumer segments, including intelligent robotic dogs, high-performance routers, television-based web browsers, advanced aircraft, and UNIX computers. Innovations such as 64-bit computing, advanced cache architectures, and ultra high-performance microarchitectures enabled key industry leaders to dream and achieve incredible products. I am glad to see continuing innovation in the MIPS architecture today.”
—Phil Bourekas, currently EVP, Marketing, Symmetricom, Inc. (Previously marketing, applications engineering, architecture, and general management of microprocessor products at Integrated Device Technology, Inc, an original MIPS licensee dating to 1988)
“Having worked in marketing to MIPS’ customers over the years, I have experienced first-hand the elegance and quality of the MIPS architecture. The MIPS architecture is still a thriving technology and I am pleased to see that the architecture is evolving to power exciting new products.”
—Andy Keane, Currently Vice President of Marketing, Audience, Inc. (Previously
Director of Product Marketing, MIPS Computer Systems 1994; Vice President of
Marketing at MIPS licensee Quantum Effect Devices/PMC Sierra, 1999 to 2002)
MIPS Architecture Licensees
“Broadcom is pleased to continue our close working relationship with MIPS to develop the latest flexible, scalable architecture for hardware virtualization, as well as to continue leading the market with highly innovative multicore processors. Our advanced MIPS64-based communications processors combine quad-issue, multithreaded instruction pipelines with up to 128 NXCPU™ processing units for greater performance for enterprise, data center and service provider networks.”
—Ron Jankov, Senior Vice President & General Manager,
Processors and Wireless Infrastructure, Broadcom
“As a long-time licensee of the MIPS64 architecture, we are pleased to continue to bring to market new and innovative products based on MIPS, including our new OCTEON Fusion base station-on-a-chip processors, and our next generations of our OCTEON III multi-core processors. The flexibility and scalability of the MIPS architecture along with our architecture license enables us to continue to push the envelope of performance and features of our advanced processors to increasingly higher levels.”
—YJ Kim, General Manager – Infrastructure Processor Group, Cavium, Inc.
“The efficient and scalable MIPS architecture enables us to build processors that are high performance and cost effective, with ultra low power consumption. We are pleased to see continued evolution of the MIPS architecture, with the addition of innovative new instructions that support the next generation of products. In particular, we believe that SIMD functionality will be increasingly important to support media-rich applications in mobile products.”
—Qiang Liu, CEO, Ingenic Semiconductor
MIPS Architecture Ecosystem
“Arteris’ goal is to be the IP integration backbone to which our SoC customers can connect with confidence. We look forward to supporting common customers whose processors leverage the MIPS R5 architecture.”
—Kurt Shuler, Vice President of Marketing, Arteris Inc.
“Carbon Design Systems and MIPS have had a longstanding partnership for virtual model creation. The R5 release brings a new realm of design possibilities. Carbon’s 100% accurate system models based upon this enhanced architecture will enable designers to optimize the performance of their SoC and develop software well in advance of actual silicon.”
—Bill Neifert, Founder and CTO, Carbon Design Systems
“The importance of having security embedded at the SoC level in order to address the security requirements entailed by the existence of open OS platforms is shared by Discretix and MIPS. Through our collaboration with MIPS, we are working to ensure that the Discretix CryptoCell® embedded security platform is aligned with the latest release of the MIPS architecture and MIPS’ processor cores.”
—Asaf Shen, Vice President of Marketing, IP Products, Discretix
“Our performance-hungry customers have found MIPS architectures to be consistently satisfying over the years, and we have enjoyed a lot of success with our ThreadX and ThreadX/SMP RTOSes in support of MIPS architectures. With MIPS Release 5, MIPS has further strengthened their performance appeal, and we look forward to helping more common customers looking for the best in processor and RTOS performance.”
—William E. Lamie, Founder, President and CEO, Express Logic, Inc.
“The partnership between Green Hills Software and MIPS is well into its second decade and is still going strong. Through our long-time collaboration with MIPS, Green Hills Software continues to advance its offerings to address the demands of the embedded industry for today and tomorrow. Our ongoing cooperation allows us to provide unparalleled performance, reliability, and advanced debugging capabilities for a wide range of MIPS processors. In turn, MIPS continues to earn its reputation for high performance processor design. Its R5 architecture can enable our customers to innovate and enhance their system designs. We look forward to supporting MIPS customers in the development of new and exciting processors.”
—Tim Reed, Vice President, Advanced Products Group, Green Hills Software
“A growing number of Imagination’s licensees and partners have been developing and shipping great SoC solutions leveraging MIPS CPUs with our PowerVR® graphics, PowerVR video, and Ensigma® communications IP cores. We’re impressed with the capabilities of the MIPS R5 architecture, such as virtualization and SIMD, which we believe will be important for next generation mobile, embedded and cloud-based solutions. We look forward to helping our customers create advanced SoCs that bring together our GPUs, VPUs and RPUs with future Aptiv CPUs from MIPS to deliver leading-edge performance per mW and per mm2.”
—Tony King-Smith, Vice President of Marketing, Imagination Technologies
“As MIPS’ strategic partner for instruction accurate models of the MIPS cores, we are excited to have support for the R5 Architecture available in our Open Virtual Platforms™ (OVP™) technology and Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK™). State of the art processor architectures, especially for multicore processors, require state of the art software development tools. OVP Fast Processor Models, used in either the Imperas OVPsim™ or M*SDK virtual platform environments, or with a SystemC/TLM-2.0 simulator, accelerate the development cycle and make analysis, debug and optimization easier for software engineers.”
—Simon Davidmann, CEO, Imperas Software Ltd.
“The inclusion of a Virtualization module and SIMD in the latest release from MIPS addresses the emerging needs of embedded systems in consumer electronics and home entertainment. Mentor will continue to build on its history of enabling licensees and system developers to take advantage of the MIPS RISC architecture with the most appropriate software technology, including the Nucleus® RTOS, Linux and Sourcery™ development tools.”
—Glenn Perry, General Manager, Mentor Graphics Embedded Software Division
“Increasing SoC complexity is driving the need for processors to support improved system concurrency, along with advanced features like virtualization and security, while increasing power and performance efficiencies of the instruction set. These enhanced features of the MIPS architecture complement Sonics’ on-chip network communications IP, which offers customers high performance and advanced system concurrency through the use of virtual channels. We look forward to customers leveraging Sonics’ on-chip networks and the MIPS Architecture R5 in a broad range of embedded applications that will power end-user devices for years to come.”
—Jack Browne, Vice President of Marketing, Sonics
“Synopsys has collaborated with MIPS and its licensees to optimize the performance of implementations of numerous MIPS processor cores. By using Synopsys’ Galaxy™ Implementation Platform and DesignWare® Embedded Memories and Logic Libraries tuned for high-performance processors, designers can now maximize performance and minimize energy consumption of their MIPS-based SoCs. We look forward to continuing to work with MIPS and customers to lower designers’ integration risk and speed their SoC products to market as MIPS continues to push its architecture to new levels of features and performance, including virtualization and SIMD capabilities.”
—Rich Goldman, Vice President, Corporate Marketing & Strategic Alliances, Synopsys
“We have a successful relationship with MIPS, supporting its processor cores with our PikeOS™ certified embedded virtualization technology. Microprocessor and system-level security are increasingly important as consumer-driven trends such as mobile payments, streaming of sensitive data across devices, and processing of high-value media content become mainstream. Virtualization technologies are key to meeting the next generation of embedded safety, security and reliability requirements across a range of markets.”
—Jacques Brygier, vice president of marketing, SYSGO
About MIPS Technologies, Inc.
MIPS Technologies, Inc. (NASDAQ: MIPS) is a leading provider of industry-standard processor architectures and cores for home entertainment, networking, mobile and embedded applications. The MIPS architecture powers some of the world’s most popular products. Our technology is broadly used in products such as digital televisions, set-top boxes, Blu-ray players, broadband customer premises equipment (CPE), WiFi access points and routers, networking infrastructure and portable/mobile communications and entertainment products. Founded in 1998, MIPS Technologies is headquartered in Sunnyvale, California, with offices worldwide. For more information, contact (408) 530-5000 or visit www.mips.com.
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MIPS, MIPS-Based, interAptiv and proAptiv are trademarks or registered trademarks in the United States and other countries of MIPS Technologies, Inc. All other trademarks referred to herein are the property of their respective owners.
About Cavium, Inc
Cavium is a leading provider of highly integrated semiconductor products that enable intelligent processing in networking, communications and the digital home. Cavium offers a broad portfolio of integrated, software compatible processors ranging in performance from 10 Mbps to over 100 Gbps that enable secure, intelligent functionality in enterprise, data-center, broadband/consumer and access & service provider equipment. Cavium’s processors are supported by ecosystem partners that provide operating systems, tool support, reference designs and other services. Cavium’s principal offices are in San Jose, California with design team locations in California, Massachusetts, India and China. For more information, please visit: http://www.cavium.com
Sr. Marketing Communications Manager,
Cavium, 2315 N. First Street,
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Telephone: +1 408-943-7417